DF6802

The DF6802 is an 8-bit synthesizable MPU IP Core, software-compatible with Motorola MC6802. It has an enhanced internal architecture which allows to execute the code approximately 4 times faster than the original 6802 running at the same clock frequency. Two software-controlled power-saving modes – WAIT and HALT are available to save additional power. These modes make the DF6802 IP Core especially attractive for automotive and battery-driven applications. The DF6802 is fully customizable – delivered in the exact configuration to meet your requirements. There is no need to pay extra for unused features and wasted silicon. The DF6802 comes with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow. Each DCD’s D68XX Core has a built-in support for DCD’s Hardware Debug System called DoCD™. It is a real-time hardware debugger which provides debugging capability of a whole System-on-Chip (SoC). Unlike other on-chip debuggers, the DoCD™ provides non-intrusive debugging of a running application. It can halt, run, step into or skip an instruction, read/write any contents of microprocessor.

• Improved, 4 times faster architecture
• Software compatible with industry standard MC6802
• De-multiplexed Address/Data Bus to allow easy memory connection
• Two power saving modes: HALT, WAIT
• Fully synthesizable
• Static synchronous design
• No internal reset generator or gated clock
• Scan test ready
• USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available