D6803

The D6803 is a synthesisable SOFT Microcontroller IP Core, fully compatible with the Motorola MC6803. It can be used as a direct replacement for MC6803 Microcontrollers. In the standard configuration the core has major peripheral functions integrated on-chip. An asynchronous serial communications interface (SCI) is included, as well as is the main 16-bit, three-function programmable timer. A software-controlled power-saving mode – WAIT is available to save additional power. This mode makes the D6803 IP Core especially attractive for automotive and battery-driven applications. DCD’s IP Core is fully customizable – delivered in the exact configuration to meet your requirements. There is no need to pay extra for unused features and wasted silicon. The IP Core comes with fully automated test bench and complete set of tests, allowing easy package validation at each stage of SoC design flow. It has a built-in support for DCD’s Hardware Debug System called DoCD™ – it is a real-time hardware debugger which provides debugging capability of a whole System-on-Chip (SoC). Unlike other on-chip debuggers, the DoCD™ provides non-intrusive debugging of a running application. It can halt, run, step into or skip an instruction, read/write any contents of microcontroller, including all registers, SFRs, including user defined peripherals and data and program memories.

DESIGN FEATURES:

All DCD’s IP Cores are technology independent which means that they are 100% compatible with all FPGA & ASIC vendors e.g.

• Altera / Intel,
• Xilinx / AMD,
• Lattice,
• Microsemi / Microchip,
  and others.

• TSMC
• UMC
• SK Hynix
  and others.

• Cycle compatible with original implementation
• Software compatible with 6803 industry standard
• I/O Wrapper making it pin compatiblecore
• Power saving mode: WAIT
• Fully synthesizable
• Static synchronous design
• No internal tri-states
• Scan test ready
• USB, Ethernet, I2C, SPI, UART, CAN, LIN, HDLC, Smart Card interfaces available